This happens when you forget to add a ‘lytic after the regulator, although the datasheet only shows a 100nF on the output. Not that it really matters on this case. On the pulse generator the logic gates are fed from a regulated supply, mostly so I can forget and use the same as the output stage. Without load and having only a 100nF ceramic halfway between the 7805 and the 4093 (less than a cm…) the rail bounces about 300mVp-p, but it becomes negligible when using a small 10uF in parallel.

Just for kicks I removed the ceramic cap, leaving the output without bypassing at all. The result was a set of narrower 800mVp-p spikes that settled quite fast.

“You have a quite novel approach to high current circuits”

(This is one in a series of posts, not in chronological order.)
Lately I’ve been playing again with switched supplies. The last time I worked mostly blind, not having a scope I sampled the available inductors around my needed values and settled with the ones that didn’t catch fire for the first test run.

Now I wanted to try more topologies, and having a lot of unknown cores, I needed to characterize them. I started with the traditional BH measurement using a small ac source and an integrator. I haven’t got round to finish the writeup on that one but it gave me some useful data to start.

Still, I needed to measure with more precision their inductance and how they behave when handling high currents. I lashed up a pulse generator with variable on period using  a couple of schmit trigger gates and a level shifter. When loaded by the gate the risetime goes from about 20ns to 200ns, there’s room for improvement considering it was made from parts I had lying around and without too much thought. I can also lower the drive voltage, above 6 volts the gate charge increases. Meanwhile, I’ll need to add an isolated trigger output.

The power section is comprised of an irf540, a medium value shunt, flyback diode, some local decoupling and a snubber. I’m using high side sensing as it lets me monitor the current and voltage on the dut easily without resorting to differential probes. Also the fet’s source won’t rise above ground when using the same supply for both the driver and power stage, sparing me from a whole lot of problems. The shunt is made with two 0.22 ohm resistors of dubious quality in parallel. While I have a couple of 50 mohm ones made just for that for most of the time the resulting voltage will be too low to work comfortably. It doesn’t look good but gets the job done (the power section was made with parts from another test fixture, so there are some leftovers).

Shorting the test leads I get this:

Plugging in all the constants the fixture has a stray inductance of about 2.1 uH. ( V/L = dI / dT , all that can be read off the cursors ). On the linear part, the average current is 25 amps, so the resistance turns out to be close to 0.4 ohms. Looking at the power input it dips around 2 volts (not that bad being it a cheap pc supply) and then overshoots by 6 volts. However, looking at the connectors on the far end it is not that bad:

So, most of the voltage drop and artefacts are due to poor local decoupling, long leads and connector resistance. That funny ringing on the drive signal is because the scope ground is just at the supply terminals and it bounces a lot given that there are about 30cm of leads in between.

After tidying things a bit and putting the snubber and flyback where they are supposed to be it works like a charm:

Redid some of the shots, so their dates don’t match anymore.

So last week I gifted myself an arm linux system with a very fast soundcard. Or a 100MHz digital oscilloscope, as they are quite the same.

A while ago I made a current sink that has served me well for testing dumb power supplies and anodizing stuff. For mostly resistive loads it behaves well, however as soon as you try to load something with small resistance and some inductance (like the head coils of an IBM3390 disk or a very stiff smps without a resistor to dissipate most of the power) it starts to oscillate.

Possessing this new gadget and a cold I decided to spend the weekend tackling this problem. I started by making another one on a breadboard and feeding back the current sense with a four terminal setup. That was quite an improvement over the original, among many mistakes I used a ground pour and despite the high current loop being very small and near the binding posts the ground potential differed by a not insignificant amount between points on the board.

The only power supply I had was a not very bad ATX one from a former desktop. It’s beefy and I can attest that the current limit and short circuit protections do work. The only downside is that it is really noisy, about 100mV p-p on the 12V rail with a 2A load and it gets worse from there, mostly from the conmutation and some hf hash. So the first thing I did was to improvise a couple of regulators with a low pass filter and a series pass transistor. After that it went down to 2mV p-p, rejection is not that great but will do.

My initial intentions were to approach the problem from a control system point but even for a quite trivial circuit like this one the modelling becomes convoluted once you add stuff like the feedback from collector to base on the output transistor, the dependence of the small signal gain and CE capacitance with the operating point or the interactions between power supplies. And most of them have influence on the oscillatory behaviour with extreme loads.

So I gave a full turn and started with a more practical solution. One of the first things to improve stability is to reduce gain or at least roll off at high frequencies. I replaced the original feedback loop with a 10K pot, wiper goes to the inverting input, one side to the opamp output with a 100n cap and the other to the sense resistor. Then, with a problematic inductor, I slowly rised the current setpoint until it started to oscillate; moving the wiper closer to the output made it stop. This has to be repeated a couple of times, as there are many unstable points. The only drawback of this approach is that the corner frequecy is fixed and you only end up changing the gain, and as such there can still be a lot of unstable operation points.

After that I continued by adding a snubber network from ground to the collector, effectively bypassing the control loop. There are many recipes for when you know with more or less accuracy the parameters of the tank circuit but in this case all I knew was that the output capacitance of the TIP122 was on the order of 200p and most of the things I am interested on have inductances from some uH to many mH. I  had a 1uF mica and a 2.7Ohm power resistor at hand and gave them a go. Bam! all the oscillations were gone.

But what happened to the dynamic response of the system?

The snubber network had no visible effect. On the other hand the naive compensation worsened the disturbance rejection. The arrangement with a potentiometer has the side effect of behaving like a low pass filter for the signal that comes from the sense resistor, thus increasing the response time, as can be seen on the following pictures (the glitchy stuff is because I just shorted the  load with an alligator clip).

While I’m mostly happy because the dummy load has improved I still feel like a hack because solving the problem from a more analytical standpoint turned out to be more difficult than what I expected. However, if I consider that I made every possible mistake on the initial design and this testbench stabilizing it was quite a feat (just a copper pour for the groundplane, power and signal grounds mixed, loops, long cables, etc).

So far I made three mathematical models that kind of satisfy me but every one explains part of the observed behaviour and involve some unnerving hand waving and simplifications. I will upload them soon.